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12-bit Dual Double-buffered CMOS D/A Converter

Model: DAC8222

  • Two matched 12-bit DACs on one chip
  • Direct parallel load of all 12 bits for high data throughput
  • Double-buffered digital inputs
  • 12-bit endpoint linearity (±1/2 LSB) over temperature
  • +5 to +15V single supply operation
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The DAC-8222 is a dual 12-bit, double-buffered, CMOS digital-to-analog converter. It has a 12-bit wide data port that allows a 12-bit word to be loaded directly. This achieves faster through-put time in stand-alone systems or when interfacing to a 16-bit processor. A common 12-bit input TTL/CMOS compatible data port is used to load the 12-bit word into either of the two DACs. This port, whose data loading is similar to that of a RAM's write cycle, interfaces directly with most 12-bit and 16-bit bus systems. (See PMI's DAC-8248 for a complete 8-bit data bus interface product.) A common bus allows the DAC-8222 to be packaged in a narrow 24-pin 0.3" DIP and save PCB space.

The DAC is controlled with two signals, WR and LDAC. With logic low at these inputs, the DAC registers become transparent. This allows direct unbuffered data to flow directly to either DAC output selected by DAC A/DAC B. Also, the DAC's double-buffered digital inputs will allow both DACs to be updated simultaneously.

DAC8222's monolithic construction offers excellent DAC-to-DAC matching and tracking over the full operating temperature range. The chip consists of two thin-film R-2R resistor ladder networks, four 12-bit registers, and DAC control logic circuitry. The device has separate reference-input and feedback resistors for each DAC and operates on a single supply from +5 V to +15 V. Maximum power dissipation at +5 V using zero or VDD logic levels is less than 0.5mW. The DAC8222 is manufactured with PMI's highly stable thin-film resistors on an advanced oxide-isolated, silicon-gate, CMOS technology. PMI's improved latch-up resistant design eliminates the need for external protective Schottky diodes.

  • Two matched 12-bit DACs on one chip
  • Direct parallel load of all 12 bits for high data throughput
  • Double-buffered digital inputs
  • 12-bit endpoint linearity (±1/2 LSB) over temperature
  • +5 to +15V single supply operation
  • DACs matched to 1% maximum
  • Four-quadrant multiplication
  • Improved ESD resistance
  • Packaged in a narrow 0.3" 24-Lead
  • DIP and 0.3" 24-lead SOL package
  • Available in die form
 
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